Fred Amaral f862c50a56 feat(dev-cycle): reclassify gate cadence for ~40-50% speedup ... Reclassify gates 1,2,4,5,6w,7w,8 (backend) and 1,2,4,5,6,7 (frontend) from subtask to task cadence. Gates 0, 3, 9 remain subtask-level. All 8 reviewers still run, all quality thresholds preserved. Additional changes: standards pre-cache at Step 1.5 (cached_standards in state); Gate 0.5 merged into Gate 0 exit criteria via ring:dev-implementation Step 7; dev-report aggregates cycle-wide via accumulated_metrics (single cycle-end dispatch); dev-refactor clusters findings by (file, pattern_category) with findings:[] traceability array; read-after-write state verification removed; per-subtask visual reports opt-in only. State schema v1.1.0 (additive - backward compatible). New shared patterns: standards-cache-protocol.md, gate-cadence-classification.md. X-Lerian-Ref: 0x1		2026-04-17 21:25:17 -03:00
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SKILL.md	feat(dev-cycle): reclassify gate cadence for ~40-50% speedup	2026-04-17 21:25:17 -03:00